This invention generally relates to input/output (I/O) buffer circuits and more particularly to a multiple voltage I/O buffer that is stable on power up.
Some advanced integrated circuits (ICs) have two distinct voltages present in the IC. There is a core voltage and an I/O voltage. Each is different than the other. These are called mixed voltage integrated circuits. When the two distinct voltages are applied to and removed from the chip, as when applied to a system implementation, they are often applied or removed at differing time points. Additionally, the state of the Input/Output (I/O) buffers is determined by logic in the core of the IC. This means that both voltages must be present, before the state of the output buffer is determinate. Usually, the core voltage will be present at the same time as the I/O voltage. However, in the case where the I/O voltage is present prior to the core voltage, there is a problem. The problem arises because there are certain signals such as a system reset, for instance, that need to be controlled, i.e., made determinate, anytime the I/O voltage is present, regardless of whether a core voltage is present.
The state of the I/O buffer cannot be solely determined by the I/O power, due to a requirement for Test Modes, and on-the-fly configuration of the buffer. Therefore there is a need for a solution in which the I/O buffer state is made determinate whenever an I/O voltage is present in a mixed voltage integrated circuit.
Against this backdrop the present invention has been developed. The present invention essentially is an integrated circuit particularly useful in a disc drive controller that ensures that the I/O buffers each power up to a known state based off of the I/O voltage. The circuitry then allows the core to determine the state of the I/O buffers only after the core voltage has reached a predetermined acceptable level. This is accomplished by supplying core power to an additional logic which resides within the I/O buffer itself. In addition, an input to the I/O buffer may be provided which functions as a mode switch from the core logic. This mode switch input controls whether the I/O buffer state is determined by the default mode or by the core logic.
There are two preferred embodiments by which this can be achieved in a disc drive that are presently envisioned. However, other means will also become apparent to those skilled in the art upon reading the following description. The first embodiment basically involves the use of a high active signal from the core to determine when to switch from the Default Mode to the Core Logic Mode. The second embodiment basically involves using a separate level detect signal circuit outside the core that provides a signal to indicate that the Core Voltage is at an acceptable level to control the core logic. The level detect signal then is used to switch between the Default Mode and the Core Logic Mode.